1. Field of the Invention
The present invention generally related to integrated circuit design. More particularly, the present invention relates to an integrated circuit design method and a design simulation system.
2. Description of the Related Art
As the frequency and size of an integrated circuit increases, the power consumption of the integrated circuit increases. The supply voltage becomes lower and, as a result, power supply noise mitigation for the integrated circuit becomes important in the design. In the integrated circuit design, a suitable design method is needed to guarantee stability of the chip voltage. In an integrated circuit, without taking the power supply decoupling design into consideration, design specification can not be met if power supply noise is excessive.
In actual applications, the operating voltage of the devices inside the integrated circuit fluctuated. Those skilled in the art also say that the voltage of the devices has noise and is unstable. FIG. 1 shows a waveform Vx of an operating voltage versus time of the devices inside an integrated circuit and power noise characteristics including: VDD which is a power supply terminal of the chip; VDD′ which is a minimum voltage of the devices inside the ship; Static IR drop which is a difference between the voltage of power supply terminal and an average voltage when the devices inside the chip operate stably and which is caused mainly by parasitic resistance in a power supply network; and Transient Voltage drop which is a difference between the voltage of power supply terminal and VDD′, ranging from scored of millivolts to hundreds of millivolts, characterizing a state of an initial charging process of the power supply network and determined collectively by capacitors and inductors in the network, wherein the chip has difference requirements on Transient Voltage drop for different applications.
In general, the voltage fluctuation is reduced by increasing decoupling capacitors. The decoupling capacitors can avoid a voltage drop due to a sudden change of current, thereby adapting to the change in current of the drive circuit.
Generally, the number of decoupling capacitors is evaluated at the late stage of chip design. If the number is insufficient, the number shall be increased and/or the chip layout shall be re-adjusted, which brings inflexibility to the design.